5 ms·
The premise that the ISA has no means for detecting integer overflow is false. This is explicitly documented in the spec, even. e.g. add t2, t0, t1
by snvzz 8mo ago
The premise that the ISA has no means for detecting integer overflow is false.
This is explicitly documented in the spec, even.
e.g.
add t2, t0, t1
bltu t2, t0, overflow
The implication that the ISA is not designed by competent engineers does not pass basic scrutiny, either.
- rep_lodsb 8mo agoThat only works for unsigned integers.
- snvzz 8mo agoRefer to the spec for the official idioms to handle every case.
- rep_lodsb 8mo agoYes, you can detect signed overflow that way, but it's a lot more instructions so it won't be used in practice. The designers of RISC-V included the bare minimum needed to compile C, everything else was deemed irrelevant.
- snvzz 8mo ago>but it's a lot more instructions so it won't be used in practice. It will be used when it needs to be handled. e.g. where elsewhere, an exception would actually handle it. Which is seldom the case. More instructions doesn't mean slower, either. Superscalar machines have a hard time keeping themselves busy, and this is an easily parallelizable task. >The designers of RISC-V included the bare minimum needed to compile C, everything else was deemed irrelevant. Refer to "Computer Architecture: A Quantitative Approach" by by John L. Hennessy and David A. Patterson, for the actual methodology followed.
- camel-cdr 8mo agoSignend 64-bit is the worst case. When I tried to enable overflow checking thr overhead of RISC-V and Arm was comparable: https://news.ycombinator.com/item?id=46588159#46668916 https://news.ycombinator.com/item?id=46588159#46668916