3 ms·

Edit: reading the below it looks like I'm quite wrong here but I've left the comment... The single transistor multiply is intriguing. Id assume they are layer

Edit: reading the below it looks like I'm quite wrong here but I've left the comment... The single transistor multiply is intriguing. Id assume they are layers of FMA operating in the log domain. But everything tells me that would be too noisy and error prone to work. On the other hand my mind is completely biased to the digital world. If they stay in the log domain and use a resistor network for multiplication, and the transistor is just exponentiating for the addition that seems genuinely ingenious. Mulling it over, actually the noise probably doesn't matter. It'll average to 0. It's essentially compute and memory baked together. I don't know much about the area of research so can't tell if it's innovative but it does seem compelling!

generuso 8mo ago
The document referenced in the blog does not say anything about the single transistor multiply. However, [1] provides the following description: "Taalas’ density is also helped by an innovation which stores a 4-bit model parameter and does multiplication on a single transistor, Bajic said (he declined to give further details but confirmed that compute is still fully digital)." [1] https://www.eetimes.com/taalas-specializes-to-extremes-for-extraordinary-token-speed/ https://www.eetimes.com/taalas-specializes-to-extremes-for-e...
- rustyhancock 8mo ago
  That's much more informative, I think my original comment is quite off the mark then.
- londons_explore 8mo ago
  It'll be different gates on the transistor for the different bits, and you power only one set depending on which bit of the result you wish to calculate. Some would call it a multi-gate transistor, whilst others would call it multiple transistors in a row...
  - hagbard_c 8mo ago
    That, or a resistor ladder with 4 bit branches connected to a single gate, possibly with a capacitor in between, representing the binary state as an analogue voltage, i.e. an analogue-binary computer. If it works for flash memory it could work for this application as well.
jsjdjrjdjdjrn 8mo ago
I'd expect this is analog multiplication with voltage levels being ADC'd out for the bits they want. If you think about it, it makes the whole thing very analog.
- jsjdjrjdjdjrn 8mo ago
  Note: reading further down, my speculation is wrong.

generuso 8mo ago

The document referenced in the blog does not say anything about the single transistor multiply. However, [1] provides the following description: "Taalas’ density is also helped by an innovation which stores a 4-bit model parameter and does multiplication on a single transistor, Bajic said (he declined to give further details but confirmed that compute is still fully digital)." [1] https://www.eetimes.com/taalas-specializes-to-extremes-for-extraordinary-token-speed/ https://www.eetimes.com/taalas-specializes-to-extremes-for-e...

rustyhancock 8mo ago
That's much more informative, I think my original comment is quite off the mark then.
londons_explore 8mo ago
It'll be different gates on the transistor for the different bits, and you power only one set depending on which bit of the result you wish to calculate. Some would call it a multi-gate transistor, whilst others would call it multiple transistors in a row...
- hagbard_c 8mo ago
  That, or a resistor ladder with 4 bit branches connected to a single gate, possibly with a capacitor in between, representing the binary state as an analogue voltage, i.e. an analogue-binary computer. If it works for flash memory it could work for this application as well.

jsjdjrjdjdjrn 8mo ago

I'd expect this is analog multiplication with voltage levels being ADC'd out for the bits they want. If you think about it, it makes the whole thing very analog.

jsjdjrjdjdjrn 8mo ago
Note: reading further down, my speculation is wrong.