3 ms·

I think the ace up the sleeve is PIO; I've seen so many weird and wonderful use cases for the Pico/RP-chips enabled by this feature, that don't seem replicable

I think the ace up the sleeve is PIO; I've seen so many weird and wonderful use cases for the Pico/RP-chips enabled by this feature, that don't seem replicable on other $1-class microcontrollers.

sandreas 8mo ago
Wow thanks, this is definetely something I have to investigate. Maybe the Sipeed Maix SDK provides something similar for the LicheeRV Nano. I'm currently prototyping a tiny portable audio player[1] which battery life could benefit a lot from this. 1: https://github.com/sandreas/rust-slint-riscv64-musl-demo https://github.com/sandreas/rust-slint-riscv64-musl-demo
15155 8mo ago
I'd rather have the Linux SOC and a $0.50-$1 FPGA (Renesas ForgeFPGA, Gowin, Efinix, whatever) nearby.
- rasz 8mo ago
  > $0.50-$1 FPGA no such thing, 5V tolerant buffers will run you more than that
  - addaon 8mo ago
    The ICE40s start well under $2 even in moderate quantities. They’re 3V3, not 5V0, but for most applications these days that’s an advantage.