3 ms·
Much lower
by khitchdee 14y ago
Much lower
- npsimons 14y agoAnd what evidence do you have for this? We aren't talking about off-the-shelf, pennies per chip PICs here. These things would not only have to recoup the design costs (not cheap for this level of complexity), they would be expensive due to the previously mentioned huge caches (basically RAM on chip) and the fact that you really aren't going to get by with web browsing without something Turing complete.
- khitchdee 14y agoFor the application that I have in mind which is low cost computing alternatives for India's tech isolated millions, I think we could get by with a 320x240 resolution screen which means each frame would be pretty small and we should be able to get by with 2 frames of total buffering. At 6 gates per bit, assuming a 16 bit color depth, that would be 6 x 16 x 2 x 320 x 240 which is about 15 million gates. Assuming the rest of the chip is much smaller, and assuming we fabricate on 180 nm process means chip area is about 15million x 0.18 x .18 x 10(-6) mm squared or .5 mm sq. That's a pretty small chip. The only cost we would have to control is the design cost. Over time we could figure out how to do this with say a product line.