3 ms·
I just implemented a 3D Layer Coding simulation via temporal vias. Check the repo. Great point on the topological protection. I agree—the Star Topology is a bri
by dnalang 10mo ago
I just implemented a 3D Layer Coding simulation via temporal vias. Check the repo. Great point on the topological protection. I agree—the Star Topology is a bridge for current planar (2D) hardware. I've actually just updated the repo with Protocol Z.X (The Hypercube), which uses temporal vias to simulate that 3D layer coding structure on the IBM Torino backend. I'm seeing if we can get that volumetric energy barrier to scale even on 'flat' NISQ chips. Thanks for the lead on 3D lattices!"