I just finished a run on IBM's Heron r1 processor (ibm_torino). Standard QEC (Surface Code) fails at this depth because the gate error rate (~2%) is above the

I just finished a run on IBM's Heron r1 processor (ibm_torino). Standard QEC (Surface Code) fails at this depth because the gate error rate (~2%) is above the threshold. Instead of correction, I implemented a distributed consensus protocol (Majority Vote) using a 10-qubit Star Topology. Raw Fidelity: 68.09% Corrected Fidelity: 98.85% It’s effectively a "Self-Healing" logical qubit. The repo has the raw telemetry and the bimodal error graph. I believe this is the software bridge we need while we wait for hardware error rates to drop below 0.1%. Happy to answer questions about the topology.