4 ms·
NPUs are a separate accelerator block, not in-CPU SIMD. The latter exists for matrix compute, but only in the latest version of AVX which has yet to reach cons
by zozbot234 10mo ago
NPUs are a separate accelerator block, not in-CPU SIMD. The latter exists for matrix compute, but only in the latest version of AVX which has yet to reach consumer CPUs.
- aleph_minus_one 10mo ago> The latter exists for matrix compute, but only in the latest version of AVX which has yet to reach consumer CPUs. As far as I am aware, AMD implemented has implemented many parts of AVX-512 in their consumer CPUs since Zen 4: https://en.wikipedia.org/w/index.php?title=AVX-512&oldid=1331680340#CPUs_with_AVX-512 https://en.wikipedia.org/w/index.php?title=AVX-512&oldid=133... On the other hand, Intel still does not support AVX-512 in Raptor Lake, Meteor Lake and Arrow Lake: > https://en.wikipedia.org/wiki/Raptor_Lake https://en.wikipedia.org/wiki/Raptor_Lake > https://en.wikipedia.org/wiki/Meteor_Lake https://en.wikipedia.org/wiki/Meteor_Lake > https://en.wikipedia.org/wiki/Arrow_Lake_(microprocessor) https://en.wikipedia.org/wiki/Arrow_Lake_(microprocessor)