3 ms·
Note that this is BLAS on the AMD/Xilinx VCK5000 FPGA: https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/vck5000.html https://www.amd.co
by nl 10mo ago
Note that this is BLAS on the AMD/Xilinx VCK5000 FPGA: https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/vck5000.html https://www.amd.com/en/products/adaptive-socs-and-fpgas/eval...
- heavyset_go 10mo agoHow does this line compare to the Ryzen AI branded Xilinx FPGAs in newer mobile AMD APUs?
- wmf 10mo agoThe Ryzen AI NPU is from Xilinx but it's not an FPGA BTW.
- heavyset_go 10mo agoI thought the XDNA line was related to Xilinx's Versal (or Alveo, I forget) lines that use FPGA fabric? Or maybe I'm misinterpreting press releases, as evidently Notebookcheck.net lied to me years ago :( [1] https://www.notebookcheck.net/AMD-details-4-nm-Zen-4-Ryzen-7040-Phoenix-HS-APUs-with-integrated-Xilinx-AI-smarts-alongside-refreshed-Zen-3-and-Zen3-offerings.679093.0.html https://www.notebookcheck.net/AMD-details-4-nm-Zen-4-Ryzen-7...
- wtallis 10mo agoIt's an IP block that Xilinx can provide for use on their FPGAs, but as implemented on the Ryzen parts it's synthesized into a hard IP block, not an FPGA block plus bitstream.