As another poster has said, SPICE is used for simulating the analog blocks of an integrated circuit and it is also used by those who design the components of a

As another poster has said, SPICE is used for simulating the analog blocks of an integrated circuit and it is also used by those who design the components of a library used by the digital designers, which contains blocks like logical gates and flip-flops, to simulate such blocks, e.g. for estimating the time delays through gates or the maximum clock frequencies for flip-flops. When an IC includes analog blocks, not only digital (but most digital ICs also include a few analog blocks, e.g. voltage regulators or oscillators for clock generation), the design of the analog blocks passes through a few stages. First the schematics of the analog blocks is designed. Then it is simulated with SPICE or similar programs, in order to verify if it satisfies the design criteria and to optimize the values of the component parameters. The simulation results cause the redesign of the schematics, until all seems fine. Then the geometric layout of the analog blocks is designed. After that a dedicated program analyzes the layout and it computes the value of parasitic components, e.g. parasitic resistances, capacitances, self inductances and mutual inductances. All the parasitic components are back-annotated on the initial schematics. Now the analog blocks are simulated again with SPICE and this time the simulations take a longer time as there are a lot of extra components. If the results are not acceptable, the schematics is redesigned and all the cycle is repeated. The simulations with SPICE usually include Monte Carlo simulations that verify that the designed blocks satisfy the performance criteria even when the values of all parameters are varied randomly, like they will vary as a consequence of the production processes. The environmental conditions, e.g. temperature and supply voltages can also be varied randomly in such simulations. Therefore the total number of simulations of a circuit, resulting from the need to search optimum parameters and the need to search the worst cases during Monte Carlo simulations, can be very large, thus the simulation times, even on server farms, can reach weeks. Modern SPICE programs usually run only the GUI on the workstation of the designer, while the actual simulations are distributed on multiple servers. When the simulation with the schematics back-annotated from layout succeeds, and the concurrently designed digital blocks of the IC are also finished, then the whole integrated circuit must be simulated. Because this is very time-consuming, usually only simple things are simulated, like the booting sequence of a CPU. For the simulation of a whole IC, one typically uses a mixed-mode simulator, which uses a Verilog/VHDL simulator for the digital blocks, coupled with a SPICE simulator for the analog blocks. To couple the blocks, special digital-to-analog and analog-to-digital components are incorporated in the schematics of both the analog and digital blocks.