3 ms·
I wonder how hard it would be to make a SID using transistors, capacitors, resistors. The fact that no one has done it makes me think it's just too difficult.
by phendrenad2 11mo ago
I wonder how hard it would be to make a SID using transistors, capacitors, resistors. The fact that no one has done it makes me think it's just too difficult.
- Neywiny 11mo agoA light googlin says estimates are that the SID is maybe 2k transistors. I think a reasonable minimum is in the thousands.
- snvzz 11mo agologic could be in a CPLD or FPGA, leaving only the analog portion discrete.
- unwind 11mo agoAt the speeds in question, I'm pretty sure the logic could be in a general-purpose microcontroller, too. But I'm not sure detailed schematics for the analog parts are available/open.
- deleted 11mo ago[deleted]
- NobodyNada 11mo agoSimilar idea: https://monster6502.com/ https://monster6502.com/ But note: > Does it run at the full speed of an original 6502 chip? > No; it's relatively slow. The MOnSter 6502 runs at about 1/20th the speed of the original, thanks to the much larger capacitance of the design. The maximum reliable clock rate is around 50 kHz. The primary limit to the clock speed is the gate capacitance of the MOSFETs that we are using, which is much larger than the capacitance of the MOSFETs on an original 6502 die. So if you built a SID using the same techniques and components, you couldn't run it in real-time without the pitch being way too low or without modifying the design. I'm not sure how hard this would be to avoid with better-spec'd components, but intuitively it makes sense for a much larger circuit to run much slower.