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Isn't HDL basically the intermediate representation you want? Plus, you can learn it with simulation or FPGA dev board which makes it reasonably accessable
by charlie-83 10mo ago
Isn't HDL basically the intermediate representation you want? Plus, you can learn it with simulation or FPGA dev board which makes it reasonably accessable
- tormeh 10mo agoAll I remember from my experience with VHDL/Verilog is that they really truly suck.