4 ms·
Makes sense, but "give each register an extra bit" seems like something that would very easily get lost with a spill or any number of other ways.
by JoshTriplett 11mo ago
Makes sense, but "give each register an extra bit" seems like something that would very easily get lost with a spill or any number of other ways.
- matu3ba 11mo agoSorry for necro-bumping, but there is a paper doing exactly that besides various other things to eliminate timing channels claiming also to prevent attacks based on speculative execution etc: "BLACKOUT : Data-Oblivious Computation with Blinded Capabilities" https://arxiv.org/abs/2504.14654 https://arxiv.org/abs/2504.14654. They basically utilize another bit of CHERI for "blinded capability" and methods to mitigate potential problems you identified.