4 ms·
x86 architecture 1 byte opcodes
- GeorgeTirebiter 11mo agoI don't understand, without further description of the symbols.
- jcranmer 11mo agoThe explanation of the symbols is largely found here: https://www.sandpile.org/x86/opc_enc.htm https://www.sandpile.org/x86/opc_enc.htm Essentially, the uppercase letter of an operand is a combination of the operand type (immediate, register, memory) along with how that is encoded (as ModR/M bytes have a register and a register/memory field), while the lowercase letter is the size of the operand (largely 8-bit/16-bit/32-bit/64-bit for the 1-byte opcodes).
- mras0 11mo agoNot sure why you're being downvoted. You need a to know quite a bit of esoteric knowledge to parse this beyond knowing x86 opcodes (even x86 assembly). It's more or less the same information you get from the intel manuals (specifically appendix 2A of https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html https://www.intel.com/content/www/us/en/developer/articles/t...). There you can also see what e.g. "Jb" means (a byte sized immediate following the instruction that specifies a sign-extended relative offset to the instruction). One-byte opcodes here differs from 2 byte opcodes (386+ IIRC) prefixed by a 0F byte and even more convoluted stuff added later.
- charcircuit 11mo ago>Not sure why you're being downvoted. I downvote people when they say they don't know what something is when they could have used a LLM to explain it to them.
- mras0 11mo agoThe link is to an opcode map with strange abbreviations with no apparent explanation. Asking "What am I looking at?" without doing any research (with a LLM or otherwise) is entirely reasonable.
- charcircuit 11mo agoIt is entirely reasonable, but these kind of comments are essentially wishing sites could cater to their knowledge level. It's like complaining that the article is not written in French. It's noise in the comment section of an article. If someone wants such a thing, browsers have functionality to translate pages to French. Not every site needs to have their own French translation to suit such a person.
- wewtyflakes 11mo agoThey were not asking for the website to change; they were asking for context so that they can appreciate the website.
- charcircuit 11mo agoIn this case the person was not asking anything. The person was stating they didn't understand. The equivalent in my analogy is a French speaker commenting that they don't understand English without further translation into French.
- GeorgeTirebiter 11mo agoGeez. I was the first one to comment. It was "This may be great, but... would you please give us more explanations / context." It's not "laziness" but trying to understand how this table is useful / teaches us something. And, to the OP, that a 'typical' HN reader didn't get it. I know 8008, 8080, z80, 80186, 80286, 80386, 80486, and some fancy opcodes for SSEx. The table still, IMHO, needs further explanation. Some have provided pointers to more info; thank you.
- Sharlin 11mo agoNeed a couple of instructions for accessing memory (and possibly loading immediates) but otherwise seems like a perfectly adequate general-purpose instruction set. Might be fun (for some values of "fun") to write a compiler backend for it.
- jeffbee 11mo agoTons of these have immediate operands. The question becomes is ADD with an implicit register destination and an immediate value in the next byte a "1-byte opcode"?
- Sharlin 11mo agoYes, indeed. I'd allow only mov to have a memory or immediate parameter as the only exception to one-byte encoding.
- themafia 11mo agoYou've always got the stack segment (SS) to play with and there's also: https://www.felixcloutier.com/x86/xlat:xlatb https://www.felixcloutier.com/x86/xlat:xlatb
- sparkie 11mo agoThey're one byte opcodes, but not one byte ops. Most of them have operands which are encoded in a ModRM byte which follows the opcode. The ModRM may be followed by a SIB byte, and that may be followed by a a variable size immediate|displacement. There are also optional prefixes to the opcode.
- benlivengood 11mo agoPush, pop, inc, and dec with a 16-bit register argument are one byte, so is ret. That technically gives you enough to do anything, but you can include jz/jnz (which do take immediate bytes, maybe cheating?), stosw, lodsw, clc, and stc to implement Brainfuck (a little harder to perform input/output with single byte instructions, but maybe pretend the OS uses int1 or int3 for calls).
- GuB-42 11mo agoHello sizecoders ;) Additional resources: http://www.sizecoding.org/wiki/DOS http://www.sizecoding.org/wiki/DOS A nice PDF with similar content: https://pnx.tf/files/x86_opcode_structure_and_instruction_overview.pdf https://pnx.tf/files/x86_opcode_structure_and_instruction_ov...
- arjvik 11mo agoIs sizecoding the same as the demoscene?
- classichasclass 11mo agoYou could call it a sub-scene of the demoscene, I suppose.
- mras0 11mo agoSize optimizing assembly code finds use in a variety of places. Demoscene for size constrained things is one of them, but also "hacking"/exploits and of course "whitehat" stuff (patches / compiler optimization etc).
- sagacity 11mo agoRelevant link to the current masters of the sizecoding niche: https://marqueedesign.demoscene.com/ https://marqueedesign.demoscene.com/
- hornd 11mo agoWhat does the 0eh comment mean?
- deleted 11mo ago[deleted]
- ryanschneider 11mo agoA reverse engineer friend once taught me I could patch an x86 function with `0xEBFE` to get the CPU to spin forever. It wasn’t until much later that I understood that (IIRC) 0xEB is the “single byte” jump instruction and that of course 0xFE is -1 as a signed byte. Hence the spin.