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I think its another symptom of the problem of there not being a clear way to get from your smart brainbox which you run a proper operating system on and do heav

by thomasjb 11mo ago

I think its another symptom of the problem of there not being a clear way to get from your smart brainbox which you run a proper operating system on and do heavy computation on to driving lots of motors or similar. There are options, but there's not one that everyone defaults to and you can get good information on.

exasperaited 11mo ago
Right — 3D printers, robotics, etc.; some sort of isolation of the microcontroller stage from the monitoring/apps stage.
ACCount37 11mo ago
I've seen multiple SoCs from China that integrate a high performance Linux core and a smaller MCU-like RTOS core into the same die. SG2000 being one example. Pretty clear to me that they're aiming at drones, 3D printers and robots with that.
- zokier 11mo ago
  Feels like everyone is doing that sort of thing these days, it is very common to see Cortex M series core integrated into big SoCs. Quickly checking TI, NXP, and ST all have M4 (or similar) cores integrated to their SoCs
- jockm 11mo ago
  Not just Chinese companies, Ti has done this forever with their Sitara SoCs. This is the chip in the beaglebone. The chip includes two PRUs which are microcontrollers that run at 200mhz and share memory with the rest of the system. TIs latest version of it (AM625x) has four A53 cores, one PRU, and a Cortex M4F. It is similar in performance to the Qualcomm chip in my own benchmarks
HeyLaughingBoy 11mo ago
The reason there's no obvious default is probably because of the differing price points and complexity of the products that are being built. e.g., from some of the products that I've worked on. - UI/database on desktop with multiple real-time processors connected via serial/Ethernet - UI/db on Linux SoM with embedded processor connected through serial - UI/db on Linux SoM and the SoM has an embedded ARM processor connected via shared memory - UI on one core of an ESP32 with real time control on a separate core. This isn't something I've done, but many 3D printers and other low-cost machines are using this architecture right now.

exasperaited 11mo ago

Right — 3D printers, robotics, etc.; some sort of isolation of the microcontroller stage from the monitoring/apps stage.

ACCount37 11mo ago

I've seen multiple SoCs from China that integrate a high performance Linux core and a smaller MCU-like RTOS core into the same die. SG2000 being one example. Pretty clear to me that they're aiming at drones, 3D printers and robots with that.

zokier 11mo ago
Feels like everyone is doing that sort of thing these days, it is very common to see Cortex M series core integrated into big SoCs. Quickly checking TI, NXP, and ST all have M4 (or similar) cores integrated to their SoCs
jockm 11mo ago
Not just Chinese companies, Ti has done this forever with their Sitara SoCs. This is the chip in the beaglebone. The chip includes two PRUs which are microcontrollers that run at 200mhz and share memory with the rest of the system. TIs latest version of it (AM625x) has four A53 cores, one PRU, and a Cortex M4F. It is similar in performance to the Qualcomm chip in my own benchmarks

HeyLaughingBoy 11mo ago

The reason there's no obvious default is probably because of the differing price points and complexity of the products that are being built. e.g., from some of the products that I've worked on. - UI/database on desktop with multiple real-time processors connected via serial/Ethernet - UI/db on Linux SoM with embedded processor connected through serial - UI/db on Linux SoM and the SoM has an embedded ARM processor connected via shared memory - UI on one core of an ESP32 with real time control on a separate core. This isn't something I've done, but many 3D printers and other low-cost machines are using this architecture right now.