4 ms·
If you wanna really see this at work on a whole other extreme, try compiling code for an N64 game. It's no surprise that optimizations for modern-day x86_64 and
by president_zippy 1y ago
If you wanna really see this at work on a whole other extreme, try compiling code for an N64 game. It's no surprise that optimizations for modern-day x86_64 and Arm64 processors with a lot of cache would not generalize well to a MIPS CPU with a cache that must be manipulated at the software layer and abysmal RDRAM latency, but the exact mechanics of it are interesting.
KazeEmmanuar did a great job analyzing exactly this so we don't have to!
https://www.youtube.com/watch?v=Ca1hHC2EctY https://www.youtube.com/watch?v=Ca1hHC2EctY
- deleted 1y ago[deleted]
- MrCheeze 1y agoExactly what I was going to post. Optimizations like loop unrolling slow down the N64 because keeping the code size small is the most important factor. I think even compilers of the time got this wrong, not just modern ones.
- president_zippy 1y agoThe one that really blows me away is how KazeEmmanuar explained the software-controlled cache. Using it well would involve either manually making calls to load/invalidate it or writing a compiler backend that replaces loading data from memory into registers with instructions to load specific memory address ranges into cache. The whole thing reminds me in a fuzzy way that I don't yet fully comprehend of register-memory architecture.