3 ms·
> The decryptor used a table held in a small SRAM that was powered by a battery. IIRC Sega’s System 16 did something similar. Was that board’s encryption crack
by pansa2 1y ago
> The decryptor used a table held in a small SRAM that was powered by a battery.
IIRC Sega’s System 16 did something similar. Was that board’s encryption cracked in the same way?
Was this style of anti-piracy measure widely used at the time, or was it only on a few 68000-based systems?
- kstenerud 1y agoThe 68k was unique in that it included in its design the ability to act as a Harvard Architecture processor (where instructions and data have separate signal pathways rather than being together in the same address space [1]) It did this via the function code pins, which signaled differently depending on whether the chip was requesting instructions or data, in supervisor or user mode. No other consumer-grade chip had this as far as I know. Sega's System 16 was also 68000 based (as was the Megadrive/Genesis), but I don't know anything about their protection scheme. [1] https://en.wikipedia.org/wiki/Harvard_architecture https://en.wikipedia.org/wiki/Harvard_architecture
- ksherlock 1y agoThe 65816 has valid data address (vda) and valid program address (vpa) pins which are essentially the same as fc0/1/2 , minus the supervisor/user mode support. vda vpa 0 0 internal operation, address bus may be invalid 0 1 valid program address, may be used for program cache control 1 0 valid data address, may be used for data cache control 1 1 opcode fetch, may be for program cache control and single step control
- userbinator 1y agoNo other consumer-grade chip had this as far as I know. The 8086/88 has status outputs which provide similar information, including which segment register is being used (CS, DS, ES, SS) and the type of bus cycle (interrupt acknowledge, read I/O, write I/O, halt, opcode fetch, read data, write data).