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Linus Torvalds Lashes Out at RISC-V Big Endian Plans
- beanjuiceII 1y ago"lashes out" or actually just talks common sense
- bell-cot 1y agoYeah - but the phrase is both clicky, and a good warning for folks unfamiliar with Linus' communication style. Diplomacy and tender feelings aside - the CEO yelling "HELL, NO!" can prevent an enormous amount of wasted time and talk.
- freedomben 1y agoLashing out and common sense aren't mutually exclusive. I.e you can lash out as someone with a message containing common sense information. I agree the headline is a bit exaggerated, but it's not incorrect. I also don't think endianess is common sense. Maybe among experienced kernel developers it is, but even Linus had to Google to see what the argument was. I don't think Linus is common, inexperienced, or dumb
- ksec 1y ago>RISC-V is enough of a mess with the millions of silly configuration issues already. Don't make it even worse. This isn't going to end well on HN.
- usamoi 1y agoNot implementing the Zbb extension but implementing big-endian. That sounds like doing it the hard way.
- general1465 1y agoInstead of adding support for Big Endian, maybe adding something like REV instruction in ARM would make more sense - https://developer.arm.com/documentation/dui0473/m/arm-and-thumb-instructions/rev https://developer.arm.com/documentation/dui0473/m/arm-and-th... Then you can still run fine in Little Endian and convert BE->LE for protocols via single instruction
- brucehoult 1y agoThat has existed for the last four years in the `Zbb` extension which is implemented in the most common RISC-V Linux SoC (JH7110, 2023) and anything more recent implementing RVA22 e.g. the SpacemiT chips. Also the P550 ones such as EIC7700X. The THead cores from 2019 (C906, C910) that precede the Zbb spec by a couple of years implement their own custom instruction. The only reasonably common Linux core that doesn't have byte reverse is the 2018 U54, used in the HiFive Unleashed (~500 made) and the Microchip Polarfire Soc and PIC64GX ranges.
- brucehoult 1y agoThere are no such plans. Someone asked if there are plans.
- richardfey 1y agoI don't take sides on the opinion of BE vs LE, but why would the kernel devs be in charge of deciding how a hardware platform design would look like? Are they in the design commitee for RISC-V? Imagine the lawn mower deciding to stop running because it detects a type of grass that the lawn mower creators didn't like.