A key element was AMD's Barcelona, which was a quad-core design that had TLB problems and failed in the field. Intel just wired together multiple dual cores in

A key element was AMD's Barcelona, which was a quad-core design that had TLB problems and failed in the field. Intel just wired together multiple dual cores in several generations of their CPUs. AMD should have had this as a contingency. They are doing this same thing now with chiplets. https://en.wikipedia.org/wiki/AMD_10h#TLB_bug https://en.wikipedia.org/wiki/AMD_10h#TLB_bug