4 ms·
It's a transpiler that takes the x86-64 binary assembly and spits out the aarch64 assembly only on the first run AFAIK. This is then cached on storage for conse
by menaerus 1y ago
It's a transpiler that takes the x86-64 binary assembly and spits out the aarch64 assembly only on the first run AFAIK. This is then cached on storage for consecutive runs.
- timschmidt 1y agoApple also implemented x86 memory semantics for aarch64 to allow for simpler translation and faster execution.
- menaerus 1y agoIn HW?
- antonvs 1y agoNot OP, but I don’t think so. Rosetta inserts ARM barrier instructions in its generated code to emulate x86 memory ordering.
- timschmidt 1y agoYup! See here: https://www.sciencedirect.com/science/article/pii/S1383762124000390 https://www.sciencedirect.com/science/article/pii/S138376212...
- Findecanor 1y agoApple silicon also has special hardware support for x86-64's "TSO" memory order (important for multithreaded code) and half-carry status flag. BTW. A more common term for what Rosetta does is "binary translation". A "transpiler" typically compiles from one high-level language to another, never touching machine code.