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It depends on the application, those bits may be materialized across architectures. The objective was maximizing safety in all contexts. My perspective is bias
by jandrewrogers 1y ago
It depends on the application, those bits may be materialized across architectures. The objective was maximizing safety in all contexts.
My perspective is biased by the requirements of high-assurance systems.
- rhdjebejdbd 1y agoIt doesn't depend on the application unless the application shares the same pointers between x86 and arm which doesn't make any sense to me. Otherwise they're right, it's not the intersection that matters but just the total bits available
- jandrewrogers 1y agoEh? The values you can store in the tags are absolutely dependent on the number of available bits. That’s a simple type safety problem. This requirement is architecture independent. You can’t cram 8 bits of tag in 7 bits if the latter is all the architecture has available. Hence why you have to design for the smallest reliable target.
- injidup 1y agoYou are agreeing with each other whilst still arguing
- forrestthewoods 1y agoIf one platform uses the upper 56 bits and another uses the lower 56 bits that doesn’t mean you have 0 bits available for tagging. It means you have 8 bits and have to go through a conversation when moving from one platform to another. This is perhaps annoying but perfectly fine. Kinda weird to materialize pointers across architectures rather than indices. But in any case surely the relevant consideration is “fewest number of free pointer bits on any single platform”. And not “intersection of free bits across all platforms”. Right?
- loeg 1y agoRight.