It can be sobering to consider how many instructions a modern CPU can execute in case of a cache miss. In the timespan of a L1 miss, the CPU could execute seve

It can be sobering to consider how many instructions a modern CPU can execute in case of a cache miss. In the timespan of a L1 miss, the CPU could execute several dozen instructions assuming a L2 hit, hundreds if it needs to go to L3. No wonder optimizing memory access can work wonders.