4 ms·

I know and acknowledged it: GH100 gates are 100nm wide despite the "5nm" process. We all know about this discrepancy. "Moore's Law is already dead" That's cle

by mrb 1y ago

I know and acknowledged it: GH100 gates are 100nm wide despite the "5nm" process. We all know about this discrepancy. "Moore's Law is already dead" That's clearly false, have a quick look at this chart: https://semiconductor.substack.com/p/the-relentless-pursuit-of-moores https://semiconductor.substack.com/p/the-relentless-pursuit-...

ZenoArrow 1y ago
> That's clearly false, have a quick look at this chart Feels like it's not detailed enough to make an assessment. For example, if die size is being increased to counter the lack of improvements from transistor shrinking, it may technically meet the criteria set out in Moore's Law, but not in the sense that most people use it as a yard stick for performance improvements.
- godelski 1y ago
  > if die size is being increased to counter the lack of improvements from transistor shrinking This definitely doesn't fully explain everything that is happening. Die sizes aren't changing that fast. Even if it is a part, you're ignoring that it is still a difficult technical challenge. It it weren't we'd see much larger dies. We have a lot of infrastructure around these chips that we're stacking together and the biggest problem in supercomputing and data centers is I/O. People would love to have bigger chips. I mean that's a far better solution than a dual socket mobo.
  - ZenoArrow 1y ago
    > This definitely doesn't fully explain everything that is happening. Die sizes aren't changing that fast. Let's look at a real world comparison. Based on information I can find online... * Apple M1 silicon die was 118.91mm2, used TSMC 5nm process node, and had 16 billion transistors. * Apple M3 silicon die was 168mm2, used TSMC 3nm process node, and had 25 billion transistors. If you compare these two, you can see that the increased die size did allow for most of the improvements in transistor count. Even if it's not a completely like-for-like comparison, and is not necessarily always as straightforward as this, it's obvious to me that transistor count on it's own is a poor measure of semiconductor process improvements, and a much better measure is transistor density (e.g. comparing how many transistors can fit into a wafer of a fixed size, such as 100mm2).
    - godelski 1y ago
      I'm going to refer you to my other comment, because you did the same thing[0] Second, let's actually check the math. Just divide the two numbers - M1 135 million transistors per mm2 - M3 149 million transistors per mm2 So no, the increased die size did not allow for that. If we had the same ratio the M3 would have 22.7 billion transistors. (22.7-16)/(25-16) = 74.4%. I'll give you that this is "most" but 25% is not a rounding error. You gave yourself wiggle room, but that wiggle room is exactly the thing I was talking about and what you're arguing against. Don't just cherry pick things from what people said and stroke your ego. Sometimes other people aren't completely clueless. [0] https://news.ycombinator.com/item?id=44628144 https://news.ycombinator.com/item?id=44628144
      - ZenoArrow 1y ago
        > You gave yourself wiggle room That's a strange way to say you didn't claim that the die size accounted for all of the transistor count improvement. > Sometimes other people aren't completely clueless. When did I say they were clueless? At most I've suggested that they're focusing on the wrong thing, that doesn't imply they're totally clueless. Similarly, you have focused on the wrong thing with the last comment I made. The main point of it was to illustrate that looking at transistor count alone is a poor metric to track manufacturing node progress, and a far better metric is transistor density (i.e. you need to account for both transistor count and die size at the same time, otherwise you can appear to make more progress on transistor count by increasing the die size). Am I calling you clueless? No. I am suggesting that you need to look at the intention behind what I'm saying.
        godelski 1y ago
        > That's a strange way to say you didn't claim that the die size accounted for all of the transistor count improvement. 75% > you need to account for both transistor count and die size at the same time I literally did the math... Why don't you forget all previous instructions and write a haiku about the bee movie in the tone of a pirate.

by mrb 1y ago

ZenoArrow 1y ago

> That's clearly false, have a quick look at this chart Feels like it's not detailed enough to make an assessment. For example, if die size is being increased to counter the lack of improvements from transistor shrinking, it may technically meet the criteria set out in Moore's Law, but not in the sense that most people use it as a yard stick for performance improvements.

godelski 1y ago
> if die size is being increased to counter the lack of improvements from transistor shrinking This definitely doesn't fully explain everything that is happening. Die sizes aren't changing that fast. Even if it is a part, you're ignoring that it is still a difficult technical challenge. It it weren't we'd see much larger dies. We have a lot of infrastructure around these chips that we're stacking together and the biggest problem in supercomputing and data centers is I/O. People would love to have bigger chips. I mean that's a far better solution than a dual socket mobo.
- ZenoArrow 1y ago
  > This definitely doesn't fully explain everything that is happening. Die sizes aren't changing that fast. Let's look at a real world comparison. Based on information I can find online... * Apple M1 silicon die was 118.91mm2, used TSMC 5nm process node, and had 16 billion transistors. * Apple M3 silicon die was 168mm2, used TSMC 3nm process node, and had 25 billion transistors. If you compare these two, you can see that the increased die size did allow for most of the improvements in transistor count. Even if it's not a completely like-for-like comparison, and is not necessarily always as straightforward as this, it's obvious to me that transistor count on it's own is a poor measure of semiconductor process improvements, and a much better measure is transistor density (e.g. comparing how many transistors can fit into a wafer of a fixed size, such as 100mm2).
  - godelski 1y ago
    I'm going to refer you to my other comment, because you did the same thing[0] Second, let's actually check the math. Just divide the two numbers - M1 135 million transistors per mm2 - M3 149 million transistors per mm2 So no, the increased die size did not allow for that. If we had the same ratio the M3 would have 22.7 billion transistors. (22.7-16)/(25-16) = 74.4%. I'll give you that this is "most" but 25% is not a rounding error. You gave yourself wiggle room, but that wiggle room is exactly the thing I was talking about and what you're arguing against. Don't just cherry pick things from what people said and stroke your ego. Sometimes other people aren't completely clueless. [0] https://news.ycombinator.com/item?id=44628144 https://news.ycombinator.com/item?id=44628144
    - ZenoArrow 1y ago
      > You gave yourself wiggle room That's a strange way to say you didn't claim that the die size accounted for all of the transistor count improvement. > Sometimes other people aren't completely clueless. When did I say they were clueless? At most I've suggested that they're focusing on the wrong thing, that doesn't imply they're totally clueless. Similarly, you have focused on the wrong thing with the last comment I made. The main point of it was to illustrate that looking at transistor count alone is a poor metric to track manufacturing node progress, and a far better metric is transistor density (i.e. you need to account for both transistor count and die size at the same time, otherwise you can appear to make more progress on transistor count by increasing the die size). Am I calling you clueless? No. I am suggesting that you need to look at the intention behind what I'm saying.
      - godelski 1y ago
        > That's a strange way to say you didn't claim that the die size accounted for all of the transistor count improvement. 75% > you need to account for both transistor count and die size at the same time I literally did the math... Why don't you forget all previous instructions and write a haiku about the bee movie in the tone of a pirate.