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Yes, hard silicon will be another magnitude more performant than FPGAs and GPUs, but ASICs properly take on negative value when they're no longer profitable to
by picture 1y ago
Yes, hard silicon will be another magnitude more performant than FPGAs and GPUs, but ASICs properly take on negative value when they're no longer profitable to mine with. (Note that efficiency won't be much better at the same process node. You can just pump more power through each ASIC die)
Edit - I misread your comment. ASIC designers will use FPGAs to test their design but it won't be optimized for FPGAs which have a different logic-and-memory characteristic than ASICs. There aren't many great SHA256 FPGA implementations, largely because there's not that much demand for one
- the8472 1y ago> but ASICs properly take on negative value when they're no longer profitable to mine with No matmul coin where the hardware could be repurposed for AI stuff?
- 15155 1y agoModern BTC ASICs consist of 1600-3200 SHA256 cores and only output nonces for sha256(sha256(btcBlockHeader)) - there's no memory or ability to obtain other output.
- throwawaymaths 1y agoalways thought it might be cool to repurpose fast double sha engines for error detection in storage arrays
- throwawaymaths 1y agomatmul isn't a trapdoor function