These configuration files exist (https://llvm.org/docs/TableGen/ https://llvm.org/docs/TableGen/, https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target

These configuration files exist (https://llvm.org/docs/TableGen/ https://llvm.org/docs/TableGen/, https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/X86/X86ScheduleZnver4.td https://github.com/llvm/llvm-project/blob/main/llvm/lib/Targ...) but it is very complicated because the processors themselves are very complicated.