Have you seen https://github.com/floooh/chips https://github.com/floooh/chips A bunch of PIO linked chips using these interfaces would feel like a weird blend

Have you seen https://github.com/floooh/chips https://github.com/floooh/chips A bunch of PIO linked chips using these interfaces would feel like a weird blend of software and hardware that stands separately to the FPGA world. I have wondered if it would actually work as a larger scale paradigm. Imagine a single piece of silicon with a bunch of RP2xxxx level processor/ram blocks with PIO links between them all. I'm not sure how it would come out compared to FPGAs for balance of flexibility/cost/power consumption/etc. but I suspect it could find a niche. antirez mentioned running some of these on RP2040's