Got me a iCE40 based FPGA which I'm playing around with Verilog and an opensource toolchain (icestorm, yosys and nextpnr) and using this as a reference https://

Got me a iCE40 based FPGA which I'm playing around with Verilog and an opensource toolchain (icestorm, yosys and nextpnr) and using this as a reference https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/README.md https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/...