Interesting that the bus bandwidth was such a bottleneck, when you could also argue it was VRAM. I never looked into why "Hardware transform&lighting" was intro

Interesting that the bus bandwidth was such a bottleneck, when you could also argue it was VRAM. I never looked into why "Hardware transform&lighting" was introduced so late (I'm guessing it didn't fit on the die next to the rasterization stuff?), but I think hardware t&l combined with storing geometry in VRAM would have reduced bus usage to a minimum.