Pentium innovation was FPU that could have many instructions in flight. You would issue 0 cycle free FXCH and keep filling pipeline with new FPU instructions h

Pentium innovation was FPU that could have many instructions in flight. You would issue 0 cycle free FXCH and keep filling pipeline with new FPU instructions https://github.com/id-Software/Quake/blob/bf4ac424ce754894ac8f1dae6a3981954bc9852d/WinQuake/d_draw.s#L132 https://github.com/id-Software/Quake/blob/bf4ac424ce754894ac... 486, Cyrix, K5 were stopping until previous instruction retires, and even AMD up to late K6-2 revision couldnt do 0 cycle FXCH.