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The core problem at Intel is they promoted the myth that ISA has no impact on performance to such a degree they started fully believing it while also somehow be

The core problem at Intel is they promoted the myth that ISA has no impact on performance to such a degree they started fully believing it while also somehow believing their process advantage was unassailable. By that time they'd accumulated so many worthless departments that turning it around at any time after 2010 was an impossibility. You could be the greatest business leader in history but you cannot save Intel without making most of the company hate you, so it will not happen. Just look at the blame game being played in these threads where somehow it's always the fault of these newly found to be inept individuals, and never the blundering morass of the bureaucratic whole.

high_na_euv 1y ago
https://chipsandcheese.com/p/arm-or-x86-isa-doesnt-matter https://chipsandcheese.com/p/arm-or-x86-isa-doesnt-matter
- deleted 1y ago
  [deleted]
- t312227 1y ago
  hello, ah ... thank you!! i was searching for exactly the interview with jim keller, which is referenced in the chips&cheese article. again: thanks for posting the article ... i didn't remember, it was anandtech ;)) "[Arguing about instruction sets] is a very sad story." * https://www.anandtech.com/show/16762/an-anandtech-interview-with-jim-keller-laziest-person-at-tesla https://www.anandtech.com/show/16762/an-anandtech-interview-... cheers a..z
ksec 1y ago
>You could be the greatest business leader in history but you cannot save Intel without making most of the company hate you, so it will not happen. This is deep. It also highlight why it is easier to hire somebody outside of the company rather than promoting from within.
phire 1y ago
> is they promoted the myth that ISA has no impact on performance IMO, Intel (and AMD) did prove the impact of a legacy ISA was low enough to not be a competitive disadvantage. Not zero, but close enough for high-performance designs. In fact, I actually think the need to continue supporting the legacy x86 ISA was a massive advantage to Intel. It forced them to go down the path of massively out-of-order μarches at a point in history where everyone else was reaping massive gains from following the RISC design philosophy. If abstracting away the legacy ISA was all the massive out-of-order buffers did, then they would be considered to be nothing more than overhead. But the out-of-order μarch also had a secondary benefit of hiding memory latency, which was starting to become a massive issue at this point in history. The performance gains from this memory latency hiding were so much higher than the losses from translating x86 instructions, which allowed Intel/AMD x86 cores to dominate in the server, workstation and consumer computing markets in the late 90s and 2000s, killing off almost every competing RISC design (including Intel's own Itanium). RISC designs only really held onto the low power markets (PDAs, cellphones), where simplicity and low power consumption still dominated the considerations. ------------------ What Intel might have missed is that x86 didn't hold a monopoly on massively out-of-order μarch. There was no reason you couldn't make a massively out-of-order μarch for a RISC ISA too. And that's what eventually happened. Starting in the mid 2010s. We started seeing ARM μarchs (especially from Apple) that looked suspiciously like Intel/AMDs designs, just with much simpler frontends. They could get the best of both worlds, taking advantage of simpler instruction decoding, while still getting the advantages of being massively out-of-order. ------------------ You are right about Intel's arrogance, especially assuming they could keep a process lead. But the "x86 tax" really isn't that high. It's worth noting that one of the CPUs they are losing ground too, is also x86.
- inkyoto 1y ago
  > In fact, I actually think need to continue supporting the legacy x86 ISA was a massive advantage to Intel. I think this is a myth that Intel (or somebody else) has invented in an attempt to save face. Legacy x86 instructions could have been culled from the silicon and implemented in the software as emulation traps – this has been done elsewhere nearly since the first revised CPU design came out. Since CPU's have been getting faster and faster, and legacy instructions have been used less and less, the emulation overhead would have been negligible to the point that no one would even notice it.
scrubs 1y ago
In 80s-1995 spc, tqm, lean engineering where a thing ... think demming award or Malcolm baldridge national award. That thinking deals squarely with the morass. Unfortunately business management succumbs too easily to short term profit (b/c of a tunnel vision on shareholder return) and trendiness. There are people in fashion who say of business: geez you gotta stand for something for more than 10 minutes. Get some class!
inkyoto 1y ago
> […] they promoted the myth that ISA has no impact on performance […] Once instructions get past the instruction decoder, they have not been x86 since Pentium Pro on the server and Pentium II on the desktop. AMD has made great strides in optimising the instruction decoder performance to minimise the translation overhead on most frequently used instructions, and the pathological cases such as 15-byte-long instructions are no longer in active use anyway. There are legacy instructions that are still there, but I don't think they affect performance as they are mere dead silicon that is getting rationalised with X86S, which culls everything non-64-bit. A more solid argument can be made that x86 is register-starved with great implications for performance, and that is true, especially for 32 bits. It is true to a certain extent with the 64-bit ISA (32 GPR's is still better than x86-64’s 16 GPR's), but various SIMD extensions have ameliorated the pain substantially. The remaining stuff, such as legacy CISC direct memory access instructions… compilers have not been emitting that stuff for over twenty years, and they just take up space in the dead silicon, lonely waiting, and yearning for a faithful moment of somebody finally giving them a tickle, which almost never comes, so the legacy instructions just cry and wail in defeaning silence. An ISA was a decisive and critical factor from the performance perspective in the 1970s-80s, and, due to advances in the last few decades, including in-core instruction fusion, register renaming, coupled with enormously large register files, out-of-order, as well as speculative execution, etc., it is no longer clear-cut or a defining feature. We now live in the post-RISC era where old and new approaches have coalesced into hybrid designs. Personally, I have never been a fan of the x86 ISA, although less from the technical perspective[0] and for a completely different reason – the Wintel duopoly had completely obliterated CPU alternatives, leading the CPU industry to stagnate, which has now changed and has given Intel a headache of epic proportions and haemorrhoids. [0] The post AVX-2 code modern compilers generate is pretty neat and is reassonably nice to look at and work with. Certainly not before.
jxjnskkzxxhx 1y ago
> they promoted the myth that ISA has no impact on performance Could you clarify? What is "ISA", and why do you think it would have an impact on performance?

high_na_euv 1y ago

https://chipsandcheese.com/p/arm-or-x86-isa-doesnt-matter https://chipsandcheese.com/p/arm-or-x86-isa-doesnt-matter

deleted 1y ago
[deleted]
t312227 1y ago
hello, ah ... thank you!! i was searching for exactly the interview with jim keller, which is referenced in the chips&cheese article. again: thanks for posting the article ... i didn't remember, it was anandtech ;)) "[Arguing about instruction sets] is a very sad story." * https://www.anandtech.com/show/16762/an-anandtech-interview-with-jim-keller-laziest-person-at-tesla https://www.anandtech.com/show/16762/an-anandtech-interview-... cheers a..z

ksec 1y ago

>You could be the greatest business leader in history but you cannot save Intel without making most of the company hate you, so it will not happen. This is deep. It also highlight why it is easier to hire somebody outside of the company rather than promoting from within.

phire 1y ago

> is they promoted the myth that ISA has no impact on performance IMO, Intel (and AMD) did prove the impact of a legacy ISA was low enough to not be a competitive disadvantage. Not zero, but close enough for high-performance designs. In fact, I actually think the need to continue supporting the legacy x86 ISA was a massive advantage to Intel. It forced them to go down the path of massively out-of-order μarches at a point in history where everyone else was reaping massive gains from following the RISC design philosophy. If abstracting away the legacy ISA was all the massive out-of-order buffers did, then they would be considered to be nothing more than overhead. But the out-of-order μarch also had a secondary benefit of hiding memory latency, which was starting to become a massive issue at this point in history. The performance gains from this memory latency hiding were so much higher than the losses from translating x86 instructions, which allowed Intel/AMD x86 cores to dominate in the server, workstation and consumer computing markets in the late 90s and 2000s, killing off almost every competing RISC design (including Intel's own Itanium). RISC designs only really held onto the low power markets (PDAs, cellphones), where simplicity and low power consumption still dominated the considerations. ------------------ What Intel might have missed is that x86 didn't hold a monopoly on massively out-of-order μarch. There was no reason you couldn't make a massively out-of-order μarch for a RISC ISA too. And that's what eventually happened. Starting in the mid 2010s. We started seeing ARM μarchs (especially from Apple) that looked suspiciously like Intel/AMDs designs, just with much simpler frontends. They could get the best of both worlds, taking advantage of simpler instruction decoding, while still getting the advantages of being massively out-of-order. ------------------ You are right about Intel's arrogance, especially assuming they could keep a process lead. But the "x86 tax" really isn't that high. It's worth noting that one of the CPUs they are losing ground too, is also x86.

inkyoto 1y ago
> In fact, I actually think need to continue supporting the legacy x86 ISA was a massive advantage to Intel. I think this is a myth that Intel (or somebody else) has invented in an attempt to save face. Legacy x86 instructions could have been culled from the silicon and implemented in the software as emulation traps – this has been done elsewhere nearly since the first revised CPU design came out. Since CPU's have been getting faster and faster, and legacy instructions have been used less and less, the emulation overhead would have been negligible to the point that no one would even notice it.

scrubs 1y ago

In 80s-1995 spc, tqm, lean engineering where a thing ... think demming award or Malcolm baldridge national award. That thinking deals squarely with the morass. Unfortunately business management succumbs too easily to short term profit (b/c of a tunnel vision on shareholder return) and trendiness. There are people in fashion who say of business: geez you gotta stand for something for more than 10 minutes. Get some class!

inkyoto 1y ago

> […] they promoted the myth that ISA has no impact on performance […] Once instructions get past the instruction decoder, they have not been x86 since Pentium Pro on the server and Pentium II on the desktop. AMD has made great strides in optimising the instruction decoder performance to minimise the translation overhead on most frequently used instructions, and the pathological cases such as 15-byte-long instructions are no longer in active use anyway. There are legacy instructions that are still there, but I don't think they affect performance as they are mere dead silicon that is getting rationalised with X86S, which culls everything non-64-bit. A more solid argument can be made that x86 is register-starved with great implications for performance, and that is true, especially for 32 bits. It is true to a certain extent with the 64-bit ISA (32 GPR's is still better than x86-64’s 16 GPR's), but various SIMD extensions have ameliorated the pain substantially. The remaining stuff, such as legacy CISC direct memory access instructions… compilers have not been emitting that stuff for over twenty years, and they just take up space in the dead silicon, lonely waiting, and yearning for a faithful moment of somebody finally giving them a tickle, which almost never comes, so the legacy instructions just cry and wail in defeaning silence. An ISA was a decisive and critical factor from the performance perspective in the 1970s-80s, and, due to advances in the last few decades, including in-core instruction fusion, register renaming, coupled with enormously large register files, out-of-order, as well as speculative execution, etc., it is no longer clear-cut or a defining feature. We now live in the post-RISC era where old and new approaches have coalesced into hybrid designs. Personally, I have never been a fan of the x86 ISA, although less from the technical perspective[0] and for a completely different reason – the Wintel duopoly had completely obliterated CPU alternatives, leading the CPU industry to stagnate, which has now changed and has given Intel a headache of epic proportions and haemorrhoids. [0] The post AVX-2 code modern compilers generate is pretty neat and is reassonably nice to look at and work with. Certainly not before.

jxjnskkzxxhx 1y ago

> they promoted the myth that ISA has no impact on performance Could you clarify? What is "ISA", and why do you think it would have an impact on performance?