> wiring diagrams of an extremely basic CPU was part of everyone's CS undergrad at my school (and I assume most other schools too?) I went to Toronto Metropoli

> wiring diagrams of an extremely basic CPU was part of everyone's CS undergrad at my school (and I assume most other schools too?) I went to Toronto Metropolitan University (ranked 800-1000 globally) and actually designing that basic CPU was too hard for most students, so they just gave us VHDL code to copy & paste into Quartus II. Their VHDL code had bugs in it which I discovered after doing the project myself from scratch and comparing my answer with the "correct" one. This has been the policy for many years now. Shockingly our co-op placement rates have dropped from 70% to 30%.