Espressif made a decisive shift to RISC-V[0], effectively abandoning Tensilica. ESP32-S3 was, AIUI, their last non RISC-V chip. It was announced in 2020 and r

Espressif made a decisive shift to RISC-V[0], effectively abandoning Tensilica. ESP32-S3 was, AIUI, their last non RISC-V chip. It was announced in 2020 and released in 2022. 0. https://www.hackster.io/news/espressif-s-teo-swee-ann-confirms-a-shift-to-risc-v-by-default-unless-we-have-some-special-needs-5e365d49bcc5 https://www.hackster.io/news/espressif-s-teo-swee-ann-confir...