2 ms·
> Which still means you have to write your code at least thrice, which is two times more than with a variable length SIMD ISA. 256 and 512 bits are the only re
by vardump 1y ago
> Which still means you have to write your code at least thrice, which is two times more than with a variable length SIMD ISA.
256 and 512 bits are the only reasonable widths. 256 bit AVX2 is what, 13 or 14 years old now.
- adgjlsfhk1 1y agono. Because Intel is full of absolute idiots, Intel atom didn't support AVX 1 until Gracemont. Tremont is missing AVX1, AVX2, FMA, and basically the rest of X86v3, and shipped in CPUs as recently as 2021 (Jasper Lake).
- vardump 1y agoOh damn. I've dropped SSE ages ago and no one complained. I guess the customer base didn't use those chips...
- ack_complete 1y agoIntel also shipped a bunch of Pentium-branded CPUs that have AVX disabled, leading to oddities like a Kaby Lake based CPU that doesn't have AVX, and even worse, also shipped a few CPUs that have AVX2 but not BMI2: https://sourceware.org/bugzilla/show_bug.cgi?id=29611 https://sourceware.org/bugzilla/show_bug.cgi?id=29611 https://developercommunity.visualstudio.com/t/Crash-in-Windows-SDK-10026100-pow-fu/10750174 https://developercommunity.visualstudio.com/t/Crash-in-Windo...