Most "RISC-V supporter" do at the very least understand what RISC-V is, and what it isn't. I have never seen an actual RISC-V supporter confuse ISA and microar

Most "RISC-V supporter" do at the very least understand what RISC-V is, and what it isn't. I have never seen an actual RISC-V supporter confuse ISA and microarchitecture.