3 ms·

Dumb question, but if register contention deadlock is possible, what would stop the shaders or hardware from, say, detecting the deadlock and spilling one or mo

• achierius 2y ago
  To answer your questions by parts: Shaders: the shader compiler does go to great lengths to avoid register bank conflicts of all kinds. Hardware: you generally don't want to have that much complexity in a GPU pipeline, especially not in the front end -- these are very simply machines, no OpO execution, very little prediction, and so their power comes from width, not depth. If you make each core a little more complex, you lose out because you now need to spend area that would have otherwise been spent on more compute units.
• dragontamer 2y ago
  If spilling to L1 cache was acceptable, then don't use this feature. The compiler automatically spills your data to memory / the stack. This exists because the GPU assembly programmer apparently wishes to provide a performance guarantee of some kind.
• Symmetry 2y ago
  And, then in theory, restoring the thread when the requested registers become available. But is the spilling/restoring registers hardware something that would see much other use? In some code hardware accelerated stack management can be a real advantage. In other code its just not flexible enough to make sense. And in some function calls are rare enough to make it not worth the investment. I sort of expect that more code running on a GPU is in the third category but I could image that I'm wrong and that it would be in the first. But if not the investment in those mechanisms might not be worth it.