Also some classic CISC features (that escaped x86 by virtue of it being a cheap micro ISA originally) can explore into ridiculous stalls in execution. The prim

Also some classic CISC features (that escaped x86 by virtue of it being a cheap micro ISA originally) can explore into ridiculous stalls in execution. The prime example is probably VAX, whose super orthogonal ISA (another "full CISC" hallmark) could lead to single instruction consuming multiple TLB entries (6 argument, up to 18 indirections assuming the arguments don't cause another page fault due to crossing pages), and another instruction could become longer than memory page. Compare x86 where modern approach is essentially "you get free LEA instruction fused with execution of the main instruction" to the point using LEA instead of certain arithmetic ones is basic optimization