2 ms·
It would be better to measure the M1 and M4 rather than Max which has non-regular release schedule. For GB6, M1 @N5A @3.2Ghz = 2360 M4 @N3E @4.4Ghz = 3720 Ro
by ksec 2y ago
It would be better to measure the M1 and M4 rather than Max which has non-regular release schedule. For GB6,
M1 @N5A @3.2Ghz = 2360
M4 @N3E @4.4Ghz = 3720
Roughly 15% IPC improvement in the past 4 years. Once you take away the clock speed and node advantage, along with Floating Point performance due to additional instruction set ( IIRC Apple still dont support SVE ) and Matrix Maths, both substantially increase benchmarks on certain GB6 test. You are looking at sub 10% IPC improvement over past 4 years give or take.
One could say 10% in 4 years is not looking good, or 10% when you are already leading the pack and others have yet to caught on to the original M1 IPC level is actually a tremendous achievement.
Hopefully something interesting in M5. Or we have reached another plateau in terms of IPC. But I could see M6 on N2 double the score of M1 in 2026.
And perhaps worth mentioning, the most interesting development is actually happening with the efficiency core, not the performance core.
- aurareturn 2y agoRoughly 15% IPC improvement in the past 4 years. Once you take away the clock speed and node advantage, along with Floating Point performance due to additional instruction set ( IIRC Apple still dont support SVE ) and Matrix Maths, both substantially increase benchmarks on certain GB6 test. You are looking at sub 10% IPC improvement over past 4 years give or take. You can have a design that maximizes IPC but can't clock high. You can have a design that clocks very high but has low IPC. They both matter. It's tradeoffs. It's fine to isolate IPC from gen to gen, but ultimately meaningless since overall performance and performance/watt is what matters. Furthermore, Apple's IPC was and still is miles ahead of AMD and Intel so the starting base is high. Improvement to IPC should be expected to be slow. Apple is finding other ways to improve performance.
- ksec 2y agoI am not sure what you are saying is any different to what I have said. The Node difference along generate at least 20% clock speed improvement give or take. i.e You could have make a M1 at higher clock speed with same power envelop but roughly 15% slower than M4 had it been on N3E. Your AMD and Intel comparison is basically rehashing what I said in the last paragraph.
- aurareturn 2y agoI am not sure what you are saying is any different to what I have said. Then I guess the second part of your post answered your first part.