3 ms·

In theory you could use 3 extra bits for a bit pointer. Although the fact that a void* could hold it (or you need to make void* larger) would likely be an issue

In theory you could use 3 extra bits for a bit pointer. Although the fact that a void* could hold it (or you need to make void* larger) would likely be an issue. The funny thing is that there are much more than 3 wasted bits on 64 bit pointers anyways. So we could just use bit pointers. Of course this has costs in the hardware.

PaulHoule 2y ago
For a long time I've thought about various sorts of weird pointer organization (think of the compressed pointers used in modern JVMs or "tiny pointers" [1] or 8086 code that uses a 16-byte aligned segment pointer to point to a struct or array and uses and ordinary pointer to point to things inside that structure) It doesn't seem too weird to me to make some kind of composite pointer that is a pointer plus some extra stuff. I've done some design work for a fantasy computer that has - 48-bit words (fills up most of a Javascript double) - 24-bit pointers (point to a 96 Mbyte address space) - a "deep" extension that adds 6 bits to point to a starting bit and a 6 bit length field for an up to a 48 bit long extent -- extravagantly and maybe unrealistic for hardware these could extend into the next word. A zero length deep bit pointer could point to a UTF-8 character inside a word and there would be a load instruction that unpacks the next codepoint [2] - a "wide" extension of 6 bits that points to one of 64 "address spaces" which are the unit of virtual memory management and could be contiguous to emulate a big address space bigger than 4GB with some room left for I/O spaces, video ram, etc. - you're still left with 6 bits of "tag" to fill out a 48 bit word used for something defined by the OS or application The backstory is that something like the IBM 360 had a baby with the PDP-10, had the word size doubled to get to VAX/370 XA size then had a baby with the Neo Geo arcade console to make a "home computer" that supports single/double width Unicode text. There would be extra points for there being a 24-bit instruction subset built in. [1] https://arxiv.org/abs/2111.12800 https://arxiv.org/abs/2111.12800 [2] ... wouldn't it be nice to find a use for the illegal offset+length combinations?
- kevincox 2y ago
  This isn't an outlandish idea. For example V8 has "pointer compression" https://v8.dev/blog/pointer-compression/ https://v8.dev/blog/pointer-compression/. This is basically just 32-bit pointers with a know base offset. They still point at bytes (but known alignment is used for tag bits, so they don't really point at bytes, but more some VM-defined word)
  - PaulHoule 2y ago
    Compressed pointers in 64-bit Java are exactly that. You save 4 bytes per reference at the cost of losing some bytes per object in overhead, how favorable that is at various heap sizes depends on the references/object ratio. The IBM 360 settled the 8-bit byte as the industry standard, but Digital Equipment Equipment kept making stragglers up to about 1980s. The only machines with oddball word sizes I ever got my hands on were the 12-bit PDP-8 (my high school when I was in elementary school) and the 36-bit PDP-10 (Children's museum in Boston.) DEC also made the PDP-11 which seemed a lot like an 8-bit micro in mindset (RSTS/E let you code BASIC in your own 64k address space) and the VAX which was the OG 32-bit architecture which inspired the 68k, 80386 and the "workstations" of the 1980s. DEC struggled with the microprocessor revolution because they didn't want to undercut sales of their old machines, but they struck back with the 64-bit Alpha architecture.

PaulHoule 2y ago

For a long time I've thought about various sorts of weird pointer organization (think of the compressed pointers used in modern JVMs or "tiny pointers" [1] or 8086 code that uses a 16-byte aligned segment pointer to point to a struct or array and uses and ordinary pointer to point to things inside that structure) It doesn't seem too weird to me to make some kind of composite pointer that is a pointer plus some extra stuff. I've done some design work for a fantasy computer that has - 48-bit words (fills up most of a Javascript double) - 24-bit pointers (point to a 96 Mbyte address space) - a "deep" extension that adds 6 bits to point to a starting bit and a 6 bit length field for an up to a 48 bit long extent -- extravagantly and maybe unrealistic for hardware these could extend into the next word. A zero length deep bit pointer could point to a UTF-8 character inside a word and there would be a load instruction that unpacks the next codepoint [2] - a "wide" extension of 6 bits that points to one of 64 "address spaces" which are the unit of virtual memory management and could be contiguous to emulate a big address space bigger than 4GB with some room left for I/O spaces, video ram, etc. - you're still left with 6 bits of "tag" to fill out a 48 bit word used for something defined by the OS or application The backstory is that something like the IBM 360 had a baby with the PDP-10, had the word size doubled to get to VAX/370 XA size then had a baby with the Neo Geo arcade console to make a "home computer" that supports single/double width Unicode text. There would be extra points for there being a 24-bit instruction subset built in. [1] https://arxiv.org/abs/2111.12800 https://arxiv.org/abs/2111.12800 [2] ... wouldn't it be nice to find a use for the illegal offset+length combinations?

kevincox 2y ago
This isn't an outlandish idea. For example V8 has "pointer compression" https://v8.dev/blog/pointer-compression/ https://v8.dev/blog/pointer-compression/. This is basically just 32-bit pointers with a know base offset. They still point at bytes (but known alignment is used for tag bits, so they don't really point at bytes, but more some VM-defined word)
- PaulHoule 2y ago
  Compressed pointers in 64-bit Java are exactly that. You save 4 bytes per reference at the cost of losing some bytes per object in overhead, how favorable that is at various heap sizes depends on the references/object ratio. The IBM 360 settled the 8-bit byte as the industry standard, but Digital Equipment Equipment kept making stragglers up to about 1980s. The only machines with oddball word sizes I ever got my hands on were the 12-bit PDP-8 (my high school when I was in elementary school) and the 36-bit PDP-10 (Children's museum in Boston.) DEC also made the PDP-11 which seemed a lot like an 8-bit micro in mindset (RSTS/E let you code BASIC in your own 64k address space) and the VAX which was the OG 32-bit architecture which inspired the 68k, 80386 and the "workstations" of the 1980s. DEC struggled with the microprocessor revolution because they didn't want to undercut sales of their old machines, but they struck back with the 64-bit Alpha architecture.