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> Can anyone explain how the dual ARM/RISC-V system works, architecturally? What I really want to know is why would anyone need or want dual architectures on o

> Can anyone explain how the dual ARM/RISC-V system works, architecturally? What I really want to know is why would anyone need or want dual architectures on one chip?

pjc50 2y ago
This is hedging their bets. Tapeouts are expensive. It seems that they had spare area, so they decided to add RISC-V as a sort of feature test and market test; that lets them determine what the market preference is between the two and acquire geek coolness points (plus an additional point for using Rust) at relatively low cost, certainly lower cost than doing two tapeouts for two different SKUs. Here at $MEDIUM_SIZED_CHIP_CO, we also have some products which have a custom DSP for realtime audio processing and an ARM for "other stuff". It's more common than you think. Even the very first Pi was effectively a video-oriented vector processor with a small ARM glued on the side.
- snvzz 2y ago
  If anything, they must have learned by now that they can simply drop the ARM cores and go full RISC-V. As long as they make their core at least feature-equivalent by implementing FPU and the secure boot chain.
  - MisterTea 2y ago
    They certainly can but the end users likely can't. I am sure there are a lot of projects that make Arm assumptions and porting isn't as simple as changing compilers. And is Risc-V tooling as mature as Arm? Doubtful. So releasing a pure Risc-V micro is Risc-Y at this time. However, giving end users both in the same chip eliminates any risk because it allows the Risc-V tooling to develop at the same time. And if that development fails, oh well, the Arm cores will keep working and the next tapout might exclude the Risc-v cores. Life moves on.
    - snvzz 2y ago
      >is Risc-V tooling as mature as Arm? RISC-V is rapidly growing the strongest ecosystem.
- MisterTea 2y ago
  > so they decided to add RISC-V as a sort of feature test and market test; After some thought I understand the problem this setup tackles: Without dual architectures, there's a conundrum: how do you sell Risc-V if everyone is tooled for Arm? So I get that offering both means they dont have to risk tapeout of a pure Risc-V die there's no immediate market for. The dual arch chip presents little to no risk while allowing the same chip to bootstrap a Risc-V tooling ecosystem. Once the end users have a mature Risc-V ecosystem the chip makers can begin to cut the Arm licensing strings they are entangled in. > It's more common than you think. You are describing co-processors or accelerators which fulfill a different role in the same system. It makes sense to have those. However, I was initially confused as to why a chip needs two architectures that fulfill the same role. That did not make sense at first glance from a technical standpoint but does from a business one.
cmrdporcupine 2y ago
Isn't half the mission of the Pi project that it is an educational project, and also taretting hobbyists? In that respect it makes perfect sense to me.

> Can anyone explain how the dual ARM/RISC-V system works, architecturally? What I really want to know is why would anyone need or want dual architectures on one chip?

pjc50 2y ago

This is hedging their bets. Tapeouts are expensive. It seems that they had spare area, so they decided to add RISC-V as a sort of feature test and market test; that lets them determine what the market preference is between the two and acquire geek coolness points (plus an additional point for using Rust) at relatively low cost, certainly lower cost than doing two tapeouts for two different SKUs. Here at $MEDIUM_SIZED_CHIP_CO, we also have some products which have a custom DSP for realtime audio processing and an ARM for "other stuff". It's more common than you think. Even the very first Pi was effectively a video-oriented vector processor with a small ARM glued on the side.

snvzz 2y ago
If anything, they must have learned by now that they can simply drop the ARM cores and go full RISC-V. As long as they make their core at least feature-equivalent by implementing FPU and the secure boot chain.
- MisterTea 2y ago
  They certainly can but the end users likely can't. I am sure there are a lot of projects that make Arm assumptions and porting isn't as simple as changing compilers. And is Risc-V tooling as mature as Arm? Doubtful. So releasing a pure Risc-V micro is Risc-Y at this time. However, giving end users both in the same chip eliminates any risk because it allows the Risc-V tooling to develop at the same time. And if that development fails, oh well, the Arm cores will keep working and the next tapout might exclude the Risc-v cores. Life moves on.
  - snvzz 2y ago
    >is Risc-V tooling as mature as Arm? RISC-V is rapidly growing the strongest ecosystem.
MisterTea 2y ago
> so they decided to add RISC-V as a sort of feature test and market test; After some thought I understand the problem this setup tackles: Without dual architectures, there's a conundrum: how do you sell Risc-V if everyone is tooled for Arm? So I get that offering both means they dont have to risk tapeout of a pure Risc-V die there's no immediate market for. The dual arch chip presents little to no risk while allowing the same chip to bootstrap a Risc-V tooling ecosystem. Once the end users have a mature Risc-V ecosystem the chip makers can begin to cut the Arm licensing strings they are entangled in. > It's more common than you think. You are describing co-processors or accelerators which fulfill a different role in the same system. It makes sense to have those. However, I was initially confused as to why a chip needs two architectures that fulfill the same role. That did not make sense at first glance from a technical standpoint but does from a business one.

cmrdporcupine 2y ago

Isn't half the mission of the Pi project that it is an educational project, and also taretting hobbyists? In that respect it makes perfect sense to me.