How interesting. I'm trying to learn enough SystemVerilog to be able to do packet processing with https://github.com/fpgasystems/Coyote https://github.com/fpgas

How interesting. I'm trying to learn enough SystemVerilog to be able to do packet processing with https://github.com/fpgasystems/Coyote https://github.com/fpgasystems/Coyote (which seems to be your background (?)). I've gone through Harris,Harris but never followed their code. This looks like a great series of tutorials. Thank you.