5 ms·

> The assembly code is filled with lots of questionable structures. In general, there are lots and lots of NOP instructions. Some are executed in the code flow,

> The assembly code is filled with lots of questionable structures. In general, there are lots and lots of NOP instructions. Some are executed in the code flow, but most are used as padding between code sections. That's common for machine code written without an assembler but typed directly into a hex monitor (don't know if Invaders was developed that way though). You kept a couple of nops in 'reserve' - usually after branches and returns - so that fixes can be applied without having to move the rest of the code around (which would mean retyping everything).

raq2185 2y ago
Even using an assembler, (which we did most of the time), we would leave a pool at the end of each PROM (and they were PROMs with a 6 week lead time) so we could patch a bug and only have to change one PROM and not the whole set.
JohnFen 2y ago
And about the ones in the code flow, it was also pretty common practice in those days to use NOPs as time delays.
- nomel 2y ago
  It's required whenever your clock cycle time is near your timing requirements. Not so much a problem with multi GHz microcontrollers, but still needed for cheap ones. Manually add up all cycles for each instruction in each branch, then pad the shorter with noop to make them the same. Repeat for each code path, and cry when you need to make a change.
  - JohnFen 2y ago
    Yep, it's a practice I still engage in with several of my microcontroller-based projects.
  - gibibit 2y ago
    I know it's probably an intentional exaggeration... but are there really any microcontrollers over 1 GHz core clock? Fast I know of is ST at around 600 MHz.
    - nomel 2y ago
      ARM Cortex based ones exceed 1GHz [1]. Although, maybe the definition of microcontroller is a bit fuzzy these days. [1] https://www.mouser.com/c/semiconductors/integrated-circuits-ics/embedded-processors-controllers/microcontrollers-mcu/?maximum%20clock%20frequency=1%20GHz~~2.4%20GHz&rp=semiconductors%2Fintegrated-circuits-ics%2Fembedded-processors-controllers%2Fmicrocontrollers-mcu%7C~Maximum%20Clock%20Frequency https://www.mouser.com/c/semiconductors/integrated-circuits-...
      - gibibit 2y ago
        ARM Cortex-A is an application processor, not a microcontroller. With an MMU (can run a full OS like Linux) and without internal memory. Cortex-M is a microcontroller, without MMU (can't run Linux etc.), and typically has internal RAM and flash. Only the NXP i.MXRT1170 reaches 1 GHz CPU clock, and this is not multi-GHz as the prior comment declared.
ndiddy 2y ago
Space Invaders was written by hand, as professional development tools cost way too much at that point. This interview contains a picture of a couple of the pages from the Space Invaders source code notebook. https://shmuplations.com/spaceinvaders/ https://shmuplations.com/spaceinvaders/
- xtiansimon 2y ago
  “Space Invaders was written by hand” I’m a neophyte. What do you mean by this? You mean “100100101…” by hand or…?
  - flohofwoe 2y ago
    Basically play "human assembler", write down the source code as assembler mnemonics on paper, then use a lookup table to convert the assembler mnemonics into hex machine code numbers, and type those numbers into the computer, while keeping track of jump target and subroutine start adresses.
loadzero 2y ago
I think at least some of the NOPs are due to this From my C transliteration: https://github.com/loadzero/si78c/blob/master/si78c.c https://github.com/loadzero/si78c/blob/master/si78c.c // xref 0462 // // This code is using the shot counter as an index into the ROM // (where some code resides), for the purposes of random number generation. // // For the saucer direction logic, only bit 0 of each bytecode is used. // // The 256 bytes used reside at 0800 -> 08FF // // If you check bit 0 of each byte in that ROM section, you will find that there is no bias, // and there are exactly 128 0's and 128 1's. // // It seems unlikely that this was an accident, I think Nishikado deliberately constructed // the ROM this way, and used some well placed NOPs to achieve fair balance. // // E.g. these NOPs // // 0854: 00 00 00 // 0883: 00 00 00 // // This information can be exploited to the player's advantage. // // If using the shot counting trick to get high scores, the // expected saucer direction for the first 6 saucers (if counting), // will be as follows: // // [22,37,52,67,82,97] // [0, 1, 1, 0, 1, 1] // [L, R, R, L, R, R]

raq2185 2y ago

Even using an assembler, (which we did most of the time), we would leave a pool at the end of each PROM (and they were PROMs with a 6 week lead time) so we could patch a bug and only have to change one PROM and not the whole set.

JohnFen 2y ago

And about the ones in the code flow, it was also pretty common practice in those days to use NOPs as time delays.

nomel 2y ago
It's required whenever your clock cycle time is near your timing requirements. Not so much a problem with multi GHz microcontrollers, but still needed for cheap ones. Manually add up all cycles for each instruction in each branch, then pad the shorter with noop to make them the same. Repeat for each code path, and cry when you need to make a change.
- JohnFen 2y ago
  Yep, it's a practice I still engage in with several of my microcontroller-based projects.
- gibibit 2y ago
  I know it's probably an intentional exaggeration... but are there really any microcontrollers over 1 GHz core clock? Fast I know of is ST at around 600 MHz.
  - nomel 2y ago
    ARM Cortex based ones exceed 1GHz [1]. Although, maybe the definition of microcontroller is a bit fuzzy these days. [1] https://www.mouser.com/c/semiconductors/integrated-circuits-ics/embedded-processors-controllers/microcontrollers-mcu/?maximum%20clock%20frequency=1%20GHz~~2.4%20GHz&rp=semiconductors%2Fintegrated-circuits-ics%2Fembedded-processors-controllers%2Fmicrocontrollers-mcu%7C~Maximum%20Clock%20Frequency https://www.mouser.com/c/semiconductors/integrated-circuits-...
    - gibibit 2y ago
      ARM Cortex-A is an application processor, not a microcontroller. With an MMU (can run a full OS like Linux) and without internal memory. Cortex-M is a microcontroller, without MMU (can't run Linux etc.), and typically has internal RAM and flash. Only the NXP i.MXRT1170 reaches 1 GHz CPU clock, and this is not multi-GHz as the prior comment declared.

ndiddy 2y ago

Space Invaders was written by hand, as professional development tools cost way too much at that point. This interview contains a picture of a couple of the pages from the Space Invaders source code notebook. https://shmuplations.com/spaceinvaders/ https://shmuplations.com/spaceinvaders/

xtiansimon 2y ago
“Space Invaders was written by hand” I’m a neophyte. What do you mean by this? You mean “100100101…” by hand or…?
- flohofwoe 2y ago
  Basically play "human assembler", write down the source code as assembler mnemonics on paper, then use a lookup table to convert the assembler mnemonics into hex machine code numbers, and type those numbers into the computer, while keeping track of jump target and subroutine start adresses.

loadzero 2y ago

I think at least some of the NOPs are due to this From my C transliteration: https://github.com/loadzero/si78c/blob/master/si78c.c https://github.com/loadzero/si78c/blob/master/si78c.c // xref 0462 // // This code is using the shot counter as an index into the ROM // (where some code resides), for the purposes of random number generation. // // For the saucer direction logic, only bit 0 of each bytecode is used. // // The 256 bytes used reside at 0800 -> 08FF // // If you check bit 0 of each byte in that ROM section, you will find that there is no bias, // and there are exactly 128 0's and 128 1's. // // It seems unlikely that this was an accident, I think Nishikado deliberately constructed // the ROM this way, and used some well placed NOPs to achieve fair balance. // // E.g. these NOPs // // 0854: 00 00 00 // 0883: 00 00 00 // // This information can be exploited to the player's advantage. // // If using the shot counting trick to get high scores, the // expected saucer direction for the first 6 saucers (if counting), // will be as follows: // // [22,37,52,67,82,97] // [0, 1, 1, 0, 1, 1] // [L, R, R, L, R, R]