3 ms·
Thank you for taking the time to report it. It has now been fixed.
by fabiensanglard 2y ago
Thank you for taking the time to report it. It has now been fixed.
- mkl 2y agoAnother typo s/game/gave/: "Another reason John game me".
- CamperBob2 2y agoSpeaking of Carmack, can you (or someone) elaborate on this quote? >DOOM cycles between three display pages. If only two were used, it would have to sync to the VBL to avoid possible display flicker. How does triple buffering eliminate VBL waits, exactly? There was no VBL interrupt on a standard VGA, was there?
- fabiensanglard 2y agoTriple buffering mean you can render at any speed, there will always be a valid target where to render and you never need to wait or vsync. This is not the case with double buffering. There can be a case, if the CPU renders fast enough, where it just finished rendering to the current target, but the previous target is still being sent to the CRT. In that case the CPU need to block on VBL.
- CamperBob2 2y agoSure, that part is well understood. But triple buffering doesn't avoid the need for vsync. If the VBL interrupt isn't reliably available on all the VGA cards out there, you are still going to have flip pages from the foreground at some point, and you would rather not do that outside the blanking interval. I suppose you could poll the CRTC every so often during the game loop or rendering process, though. That must have been how it worked.
- rep_lodsb 2y agoThe CRTC latches the display start address at the beginning (IIRC) of vblank, so you can just write a new value to that register at any time without affecting the current frame.
- pjc50 2y agoThere was a vbl interrupt: https://gamedev.stackexchange.com/questions/206442/dos-vga-card-vertical-sync-how-to-check-for-blanking-interval/206446#206446 https://gamedev.stackexchange.com/questions/206442/dos-vga-c...
- CamperBob2 2y agoNot something reliable enough to use in a shipping product, apparently.
- o11c 2y agoI imagine that a GPU-only "select this buffer when the next frame happens" would be better supported, even if the CPU doesn't get told when. Or even if you can't get an interrupt, you could poll periodically, etc.
- rep_lodsb 2y agoThat's already how it works on the VGA, you write the start address into a CRTC register and it will be used once the next frame starts, without affecting the current one.