2 ms·
My understanding is that all architectures that matter do idiom recognition for ll/sc to guarantee forward progress when ll/sc is used to implement CAS and othe
by gpderetta 2y ago
My understanding is that all architectures that matter do idiom recognition for ll/sc to guarantee forward progress when ll/sc is used to implement CAS and other common lock-free and wait free patterns, at least as a fallback.
- dzaima 2y agoe.g. this is the guarantee in RISC-V: https://github.com/riscv/riscv-isa-manual/blob/70040578316b9978056c9f33ac654ea19f459169/src/a-st-ext.adoc#eventual-success-of-store-conditional-instructions https://github.com/riscv/riscv-isa-manual/blob/70040578316b9...