4 ms·
> how does that hardware implementation work internally? I don’t know, but based on performance difference between FP32 and FP64 square root instructions, the
by Const-me 2y ago
> how does that hardware implementation work internally?
I don’t know, but based on performance difference between FP32 and FP64 square root instructions, the implementation probably produces 4-5 bits of mantissa per cycle.