3 ms·
>Oh yeah, I completely forgot to mention proximity. 10x 100nF caps might be superior to 1x 1uF simply because the latter can only be close to 1 pin whereas the
by rcxdude 2y ago
>Oh yeah, I completely forgot to mention proximity. 10x 100nF caps might be superior to 1x 1uF simply because the latter can only be close to 1 pin whereas the first can be close to 10 power supply pins.
That's the point of the article, though. 1uF caps are now available in package sizes smaller than 100nF caps were when the rule of thumb originated. You can get a 16V rates uF cap in 0201 nowadays, so proximity really isn't a problem.
I second the general rule of thumb: stacking decoupling capacitors is extremely rarely needed nowadays. Pick your size, put the largest capacitor you can get in that size (or, if you're paranoid and think the manufacturers might be pushing things, go one size smaller) as close to the chip as you can, and maybe assess if you need some bulk capacitance as well, but more likely you are liable to wind up with too much capacitance.
- exmadscientist 2y ago> assess if you need some bulk capacitance as well, but more likely you are liable to wind up with too much capacitance Remember also that most bulk capacitor types bring in some ESR, and the associated damping can really help a PDN. If you're too lazy to simulate, at least leave a footprint for a tantalum or aluminum capacitor!