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Even if i try to avoid the hyperbole by saying by the time SiFive nodes will reach maturity with the current cortex, GPT-30 will be out etc ... The fact is tha

Even if i try to avoid the hyperbole by saying by the time SiFive nodes will reach maturity with the current cortex, GPT-30 will be out etc ... The fact is that the node difference (7nm vs. 10nm) is critical here, SiFive’s area/power efficiency gains aren’t purely architectural but partly process-driven. Even with that advantage, matching a 2018 A75 (designed for mobile thermal/power limits) in 2024 feels like catching up to ARM’s rearview mirror. ARM’s A720 today benefits from years of iterative refinement (cache hierarchies, branch predictors, memory subsystems) that aren’t easily replicated overnight. Scaling beyond cores is another hurdle, interconnects, memory controllers, and accelerators matter just as much as raw IPC. RISC-V’s ecosystem (tools, firmware, software optimization) also lags ARM’s, which could limit adoption even if the P550 were competitive. SiFive’s claims highlight RISC-V’s potential, but until they benchmark against modern cores on the same node and demonstrate system-level competitiveness (not just microarchitecture wins), the gap will persist. That said, disruption takes time—ARM wasn’t born polished either. The real test is whether SiFive can close the maturity deficit before ARM’s roadmap (and AI-driven heterogeneity) leaves them behind. I doubt it, the GAP in GPU cores alone between Cortex and M Series is so huge, and then there are accelerators like NPU cores, which SiFive havent even started working on yet. Even Cortex NPU's are behind Apple M Series, and if a large companies liek Samsung, Qualcomm, Mediatek lag behind Apple is Quality ARM chips with Decent GPU, NPU on Board memory, what hope does SiFive Have? At Worse Burn Investor money and die. At Best supply chips for your remote control, washing machine etc ... competing with mainstream applications would not be wise by any standards.

Symmetry 2y ago
It's also worth noting that they're claiming a high perf/GHz, not a high perf. It's easy to shrink a chip by using slower but more compact libraries that don't increase gate size as much for larger fanout at the cost of a lower maximum frequency, like AMD's compact cores do. And lowering clock speeds mean that your main memory latency, measured in clock cycles, goes down increasing perf/GHz too.

Symmetry 2y ago

It's also worth noting that they're claiming a high perf/GHz, not a high perf. It's easy to shrink a chip by using slower but more compact libraries that don't increase gate size as much for larger fanout at the cost of a lower maximum frequency, like AMD's compact cores do. And lowering clock speeds mean that your main memory latency, measured in clock cycles, goes down increasing perf/GHz too.