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> I'm pretty sure they're going to say they don't regret it at all. i didn't say that as a supposition - i know that they regret it. the chisel compiler has be
by almostgotcaught 2y ago
> I'm pretty sure they're going to say they don't regret it at all.
i didn't say that as a supposition - i know that they regret it. the chisel compiler has been an enormous (enormous) technical debt/burden for them because of how slow/resource intensive it is.
- sdvsfqe 2y ago> how slow/resource intensive it is compared to what? It's not like all the other EDA tools are really fast or not resource intensive. For smaller design firms I would think things like FireSim [1] would be a significant advantage. I can imagine it is a disadvantage in other ways, i.e. it's only possible to do single phase positive edge synchronous design, which could be an impediment to high performance digital design. But I wouldn't imagine that scala performance is particularly significant. [1] https://fires.im https://fires.im
- almostgotcaught 2y agoIt's pointless to argue with people on hn because you'll tell them "I have cold hard experience" and they'll respond with hype links and conjecture. > But I wouldn't imagine that scala performance is particularly significant. Imagine all you'd like - reality is much less imaginative though.
- oldgradstudent 2y agoJust curious, do they have a migration plan? Have they started new designs using Verilog/SystemVerilog/VHDL?
- d_tr 2y agoInteresting. So, do you know what they'd choose now if they started over? SystemVerilog?