4 ms·
The instruction is VP2INTERSECT. Note this instruction may not be supported by Intel processors after Tiger Lake. https://www.felixcloutier.com/x86/vp2intersec
by basementcat 2y ago
The instruction is VP2INTERSECT. Note this instruction may not be supported by Intel processors after Tiger Lake.
https://www.felixcloutier.com/x86/vp2intersectd:vp2intersectq https://www.felixcloutier.com/x86/vp2intersectd:vp2intersect...
http://www.numberworld.org/blogs/2024_8_7_zen5_avx512_teardown/#VP2INTERSECT http://www.numberworld.org/blogs/2024_8_7_zen5_avx512_teardo...