The history of this "There are only two hard things in Computer Science: cache invalidation and naming things" quote attributed to Phil Karlton is slightly inte

The history of this "There are only two hard things in Computer Science: cache invalidation and naming things" quote attributed to Phil Karlton is slightly interesting. 1) According to Tom Bajzek on Phil Karlton's son's blog, the saying goes back to Phil Karlton's time at CMU in the 1970s: https://www.karlton.org/2017/12/naming-things-hard/#comment-21785 https://www.karlton.org/2017/12/naming-things-hard/#comment-... 2) How did Phil recognize this difficulty around cache invalidation before he even entered the workforce (going to Xerox PARC, DEC, SGI, Netscape)? Answer: as a grad student, he was contributing to discussions around the discussion of the Hydra filesystem being designed at CMU at that time. The following 1978 paper credits discussions with him by name, which is probably a good hint where he learned about the difficulties of cache invalidation: https://dl.acm.org/doi/pdf/10.5555/800099.803221 https://dl.acm.org/doi/pdf/10.5555/800099.803221 He started out more interested in the math side of things perhaps, https://dl.acm.org/doi/pdf/10.1145/359970.359989 https://dl.acm.org/doi/pdf/10.1145/359970.359989 3) Also mildly coincidental to me is that one of SGI's core technical accomplishments in its waning years (about the time Phil left them for Netscape so he likely was not personally involved; I don't know) was dealing with memory caching in highly scalable single-system-image SMP (symmetric multiprocessing) servers when you go from 16+ CPU SMPs to a memory subsystem needing to support 512-1024 CPUs... Answer: you have to A) make the memory non-uniform (non-"symmetric") in it's latency to different CPUs (NUMA: (https://en.wikipedia.org/wiki/Non-uniform_memory_access https://en.wikipedia.org/wiki/Non-uniform_memory_access)), and B) invent new ways of handling the resulting cache coherency problems to mask the fact that some CPUs have closer access to memory than other CPUs to keep the programming model more like SMP and less like pure separate-memory clustering. Here's a paper outlining how that was done in 1998: https://courses.cs.washington.edu/courses/cse549/07wi/files/sgiorigin.pdf https://courses.cs.washington.edu/courses/cse549/07wi/files/... which in turn was based on Stanford's FLASH multiprocessor work: https://dl.acm.org/doi/pdf/10.1145/191995.192056 https://dl.acm.org/doi/pdf/10.1145/191995.192056 This cache-coherent NUMA (ccNUMA) technique went on to be used in AMD Opteron, Itanium, and Xeon SMP systems till this vary day.