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Yeah. I got as far as the zero-page description and stopped reading. The 6502 was the first microprocessor I learned (on the KIM-1) in 1979. All that zero pa

Yeah. I got as far as the zero-page description and stopped reading. The 6502 was the first microprocessor I learned (on the KIM-1) in 1979. All that zero page addressing offers is a faster way to access memory, because when using zero-page addressing modes, you only need one octet for the address instead of two. When using them on a 1MHz CPU with no cache, you've just saved many microseconds because you didn't need to fetch the high order address octet from program memory! On the 6502, you can absolutely access all 64K of memory space with an LDA instruction. The other weird thing about the 6502 is "page one", which is always the stack, and is limited in size to 256 bytes. The 256 byte limit can put a damper on your plans for doing recursive code, or even just placing lots of data on the stack. I've done lots of embedded over the years, and the only other processor I've developed on that has something similar to the 6502 "zero page" memory was the Intel 8051, with it's "direct" and "indirect" memory access modes for the first 128 bytes of volatile memory (data, idata, bdata, xdata, pdata). What a PITA that can be!

bluGill 2y ago
> On the 6502, you can absolutely access all 64K of memory space with an LDA instruction. There are two LDA instructions (maybe more, I too am about 40 years rusty). One loads from page 0 only and thus saves the time by only needing to read one byte of address, and the other reads two bytes of addresses and can read from all 64k. In latter years you had various bank switching schemes to handle more than 64k, but the CPU knew nothing about how that worked so I'll ignore them. Of course your assembler probably just called both LDA and used other clues to select which but it was a different CPU instruction.
- rbanffy 2y ago
  There are multiple, but indirect indexed (pointer + offset) is only for page zero, but you have two of them, one for X and one for Y (I don't recall the differences anymore). The 6502 was a really sweet little processor.
rbanffy 2y ago
> All that zero page addressing offers is a faster way to access memory I like to say if made me feel I had 256 general-purpose registers to play with.

bluGill 2y ago

> On the 6502, you can absolutely access all 64K of memory space with an LDA instruction. There are two LDA instructions (maybe more, I too am about 40 years rusty). One loads from page 0 only and thus saves the time by only needing to read one byte of address, and the other reads two bytes of addresses and can read from all 64k. In latter years you had various bank switching schemes to handle more than 64k, but the CPU knew nothing about how that worked so I'll ignore them. Of course your assembler probably just called both LDA and used other clues to select which but it was a different CPU instruction.

rbanffy 2y ago
There are multiple, but indirect indexed (pointer + offset) is only for page zero, but you have two of them, one for X and one for Y (I don't recall the differences anymore). The 6502 was a really sweet little processor.

rbanffy 2y ago

> All that zero page addressing offers is a faster way to access memory I like to say if made me feel I had 256 general-purpose registers to play with.