Can be huge depending how low level you are allowed to go. For example from recent 38C3 - The Design Decisions behind the first Open-Everything FABulous FPGA h

Can be huge depending how low level you are allowed to go. For example from recent 38C3 - The Design Decisions behind the first Open-Everything FABulous FPGA https://www.youtube.com/watch?v=3Lll9_-gYGg https://www.youtube.com/watch?v=3Lll9_-gYGg there was a mention of using open source SRAM library versus Siemens one. Open source macros build 1KB 12MHz ram while siemens is 3x capacity 100MHz https://youtu.be/3Lll9_-gYGg?feature=shared&t=1740 https://youtu.be/3Lll9_-gYGg?feature=shared&t=1740 Siemens delivers this by breaking foundry design rules :) https://youtu.be/3Lll9_-gYGg?feature=shared&t=1878 https://youtu.be/3Lll9_-gYGg?feature=shared&t=1878